Professional title:Software engineer (FPGA software design direction)
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Wages:
Negotiable
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Description:1. Master's degree or above in electronic information, computer, automation and other related majors;
2. Proficiency in using QuartusⅡ/Vivado software and VerilogHDL language;
3. Familiar with timing constraints, image processing, pattern recognition algorithm simulation is preferred.
2. Proficiency in using QuartusⅡ/Vivado software and VerilogHDL language;
3. Familiar with timing constraints, image processing, pattern recognition algorithm simulation is preferred.
- Location of work: Anhui Province - Hefei City - Shushan District
- Department:Campus Recruiting
- Number of people to be recruited:3
- Nature of work:Full time
- Age limitation for work:No limit
- Educational background:Master
- Age:https://hefei.goodjobs.cn/
- Gender:No limit
- Time of issue: 2021-02-04 15:07:00
Description:1. Master's degree or above in electronic information, computer, automation and other related majors;
2. Proficiency in using QuartusⅡ/Vivado software and VerilogHDL language;
3. Familiar with timing constraints, image processing, pattern recognition algorithm simulation is preferred.
2. Proficiency in using QuartusⅡ/Vivado software and VerilogHDL language;
3. Familiar with timing constraints, image processing, pattern recognition algorithm simulation is preferred.
Description of position:
1. Master's degree or above in electronic information, computer, automation and other related majors;
2. Proficiency in using QuartusⅡ/Vivado software and VerilogHDL language;
3. Familiar with timing constraints, image processing, pattern recognition algorithm simulation is preferred.
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